PQC Silicon Is Here Today: How New Security Chips Are Future-Proofing Devices Against Quantum Threats

A new generation of security chips is arriving on the market - and its timing could not be more critical. As quantum computing edges closer to commercial viability, chipmakers including STMicroelectronics, Samsung, Infineon, and Microchip Technology are shipping silicon with dedicated hardware accelerators for post-quantum cryptography (PQC), signalling that the industry is no longer waiting for the quantum threat to materialise before acting.

The push is driven by a sobering reality: quantum computers capable of breaking today's encryption standards may be commercially available as early as 2028. More urgently, malicious actors are already executing what security professionals call "harvest now, decrypt later" attacks - intercepting and stockpiling encrypted data today, with the intention of decrypting it once quantum capability arrives. That makes the threat live now, not in the future.

STMicroelectronics Puts PQC Into a Single Die

The most comprehensive offering to emerge is STMicroelectronics' ST54M chip, a single-die silicon solution that combines a hardware accelerator for PQC with an NFC controller, an embedded secure element (eSE), and an embedded SIM (eSIM). The integration targets smartphones and personal gadgets, covering the full range of secure connectivity use cases - contactless payments, transit ticketing, access control, digital identity, and digital car keys.

The chip's hardware engine supports major PQC algorithms including ML-KEM and ML-DSA, the standards recently finalised by the US National Institute of Standards and Technology (NIST). It is also designed to defend against side-channel and fault-injection attacks, which remain a practical concern even in post-quantum deployments.

"By combining a PQC hardware accelerator with NFC, embedded secure element, and embedded SIM capabilities, ST54M gives device makers a secure path to start preparing next-generation mobile experiences," said David Richetto, Connected Security Group VP and Division General Manager at STMicroelectronics.

Samsung Goes Independent of the Application Processor

Samsung's S3SSE2A, unveiled at CES 2026, takes a different architectural approach. Where most existing PQC solutions embed cryptographic operations within the application processor's security block, S3SSE2A operates as a standalone secure element - independent of the AP entirely. This means it provides a protected security environment regardless of which application processor a device uses.

On the performance side, the chip implements FIPS 204 operations - the digital signature standard based on a module-lattice algorithm - and combines hardware and software for PQC operations, delivering approximately 17 times faster computation compared to software-only PQC implementations. The result is a chip that can store keys and execute security operations in an isolated environment, significantly reducing the attack surface.

MCU and MPU Vendors Join the PQC Wave

The shift is not confined to dedicated security chips. Microcontroller and microprocessor suppliers are embedding PQC support directly into their silicon as well.

Infineon's PSOC Control C3 industrial microcontrollers are now compliant with PQC requirements for firmware protection as outlined in the Commercial National Security Algorithm (CNSA) Suite 2.0, the US government's benchmark for next-generation cryptographic standards.

Microchip Technology's PIC64HX family of microprocessors goes further, supporting both FIPS 203 (ML-KEM) and FIPS 204 (ML-DSA) - the two cornerstone PQC algorithms standardised by NIST. Purpose-built for intelligent edge designs, the PIC64HX processors bring defence-grade security to industrial and embedded applications that have historically operated with minimal cryptographic protection.

Testing the Quantum-Resistant Silicon

With PQC moving into hardware, the test and measurement industry is stepping up to validate it. Keysight Technologies, following its acquisition of security test lab Riscure, now offers a dedicated security testing platform for PQC algorithm implementations - beginning with the Dilithium algorithm, one of the original NIST PQC selections. The platform enables chip designers to verify that their implementations are genuinely resistant to quantum-era attacks, not just compliant on paper.

Regulatory Urgency Accelerates the Transition

The regulatory environment is reinforcing the market push. The US Government's Executive Order 14409 on PQC, issued this month, is the latest formal signal that migration to quantum-safe cryptography is no longer optional for organisations handling sensitive data. Defense communications, financial records, intelligence infrastructure, and personal data are all in scope.

The new silicon offerings - from full security chips to PQC-enabled MCUs -- lay the technical foundation that organisations will need to comply with these mandates. Hardware acceleration matters here: PQC algorithms are computationally heavier than their classical counterparts, and software-only implementations carry a significant performance penalty that hardware engines eliminate.

What It Means Going Forward

The arrival of PQC-native silicon marks an inflection point. For device makers, the question is no longer whether to prepare for the quantum era, but how quickly they can design PQC-capable chips into their next product cycle. For enterprises and governments, it reinforces the case for beginning cryptographic migration now - before quantum computers make delay an irreversible liability.

The chips are ready. The threat timeline is shortening. The window for preparation is open, but it will not stay open indefinitely.